... 逻辑计时图 logic timing diagram 逻辑翻译器 logic translator 逻辑树 logic tree ...
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决策逻辑翻译器 decision logic translator
教学逻辑翻译器 teaching logic translator
判定逻辑翻译器 decision logic translator
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本文阐明将硬件逻辑翻译器产生的布尔方程集合划分成子集后，转换成多维体列阵。
This paper describes the partitioning of the set pf the Boolean equations generated by the hardware logic translator and the conversion of the subset into cube arrays.
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