当DRNN预测下一时刻缓冲区中的信元数超过阈值时，控制器产生一个反馈控制信号减小信源进入网络的信元速率以避免拥塞发生。
When DRNN predicts that the number of cells in buffer exceeds the threshold limit in the next time cycle, a control signal is generated by the controller to throttle arrival cell rate.
在将内部复位信号加到CPU的同时，提高由DRAM控制器所生成的用于刷新DRAM中数据的刷新信号的速率。
While the internal reset signal is being applied to the CPU, the rate of a refresh signal being generated by a DRAM controller for refreshing data in DRAM is increased.
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