设计了数据排队与数据接口，在数据排队模块提出了横向输入、纵向输出的算法。
Design data line up with data interface, line up module propose horizontal input, vertical algorithm that output in data.
本文主要阐述基于FPGA实现VLBI标准接口数据输入模块和数据输出模块。
The FPGA-based implementation of data input module and data output module of VLBI standard interface is expatiated in this dissertation.
然后对各个模块的设计和实现做了详细说明，介绍了各个模块的输入输出处理流程和接口；
Next, the implementation of all modules is detailed discussed, including the process of input and output.
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