它首先通过虚拟寄存器分配算法获得虚拟寄存器,然后基于这些虚拟寄存器添加特定的控制流检测指令。
The control flow faults were detected by obtaining the virtual register and adding some control flow checking instructions into the program based on the virtual register.
整个解释器的核心是一个虚拟的寄存器机器,及其支持的一套基本指令集。
The core of the scheme interpreter is the Virtual Register Machine with a set of supported basic instructions.
因此,在POWER 5中引入了PUR寄存器,用于存储各个虚拟处理器实际使用的周期。
Hence, the PUR register, introduced in POWER5, stores the actual cycles consumed by each virtual processor.
应用推荐