通过改变线性反馈移位寄存器的结构滤掉无效的测试矢量从而实现低功耗测试。

For low power consumption during test mode, the proposed approach ignores the non detecting vectors by altering the structure of LFSR.

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本文介绍了一种使用非最长周期序列的非定长线性反馈移位寄存器作为数字系统内部测试生成器的方案，并给出了设计这种测试生成器的设计过程和算法。

In this paper, a scheme is presented, in which an infinite length's LFSR with non maximum cycle sequence is used as a built-in test generator in digital systems.

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本文提出了一种基于受控线性反馈移位寄存器（LFSR）进行内建自测试的结构及其测试矢量生成方法。

A new BIST structure with the method of test vector generation based on a controlled LFSR is proposed.

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