浮点加法器是协处理器的核心运算部件，是实现浮点指令各种运算的基础，其设计优化是提高浮点运算速度和精度的关键途径。
High-Speed Floating-point Adder is a critical part in the coprocessor, which is attached to the computing basis of floating-point instructions.
默认情况下，编译器使用协处理器的80位寄存器保存浮点计算的中间结果。
By default, the compiler USES the coprocessor's 80-bit registers to hold the intermediate results of floating-point calculations.
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