...指令级; 编译优化; 静态功耗; 漏电流; 内联优化; 高速暂存区 [gap=872]Key words:power optimization; hardware level; instruction level; compilation optimization; static power consumption; leakage current; inline op..
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指令级并行 ILP ; instruction level parallelism
指令级并行性 ILP ; Instruction level parallelism
宏指令级 [计] macroinstruction level
指令级模拟器 instruction-level simulator
指令级并行墙 ILP Wall
指令级功耗模型 instruction level power model
指令级并行处理 Instruction Level Parallel Processing
指令级加速 instruction level acceleration
指令级扩展结构 Instruction Set Extension Fabric
In this paper, we’ll focus on optimizations of H.264 encoder at algorithm level and instruction level.
本文的工作主要着重于对H.264的编码算法进行算法级与指令级的优化。
参考来源 - H.264视频编码标准的研究与优化实现·2,447,543篇论文数据，部分数据来源于NoteExpress
讨论了指令级并行运算环境中多媒体数据处理的实现方法和性能。
This paper presents the implementation approach and the experimental results of multimedia realtime processing on the ILP (Instruction Level Parallelism) computing platform.
指令调度通过调整指令之间的顺序来提高指令级并行度(ILP)。
Instruction scheduling is used to exploit the instruction level parallelism (ILP) inherent in program through reordering its instructions.
针对笔者自主研制的LS - RISC微处理器，讨论了其指令级功耗模型的开发。
The development of instruction level power model is discussed to our self-made LS-RISC microprocessor.
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