...区域的一深阱区被隔离开来，以及该隔离薄膜比在该单元区域的一隔离薄膜要厚些，以便不会产生一寄生晶体管(Parasitic transistor)及可防止一漏电流。
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举例说明，20兆赫兹的峰点是钳位过程结束后主要由场效应晶体管输出电容和变压器漏感引起的寄生振荡产生的。
For example, the peak at 20 MHz in the spectrum is caused by the parasitic oscillation due to the output capacitance of the MOSFET and the leakage inductance of the transformer.
最后通过对器件运算精度的分析，得出其运算精度主要受MOS晶体管寄生电容等因素的影响。
Finally, the operation precision of the device is analyzed, the conclusion that the parasitical capacitor of the MOS transistor is the main factor to affect the precision is obtained.
该模型考虑了载流子的速度饱和现象和寄生双极性晶体管的影响，获得了开态下LDMOS 漂移区中的电场分布。
The model considers the drift velocity saturation of carriers and influence of parasitic bipolar transistor. As a result, electric field profile of n drift in LDMOS at on state is obtained.
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