评测表提供为特定的处理器事件收集的采样的百分数或数量，比如高速缓存线路故障的数量、传输后备缓存(TLB)故障的数量，等等。
The profiling table provides the percentage and number of samples collected for specified processor events such as the number of cache line misses, Transition Lookaside Buffer (TLB) misses, and so on.
为了加快地址转换，架构中有一个 processor-on-a-chip (PoC) 缓存和相关的转换后备缓冲器 (TLB) 逻辑。
To speed up address translation, there is a processor-on-a-chip (PoC) cache and associated logic called translation lookaside buffer (TLB).
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