通过两个典型例子，介绍了卡诺图应用于同步时序电路的逻辑分析和逻辑设计的方法。
With two concrete examples, this paper discusses the application of Karnaugh figure in synchronous time-sequence logic circuit's analysis and design.
同步时序机的状态驱动可根据状态图来完成，状态图通常由次态方程求得。
The state drive of a synchronous sequential machine may be finished according to the state diagram which is usually derived from the next state equation.
下图是一个通常的同步读周期的时序图。
Figure below provides the timing diagram of a generic synchronous read cycle.
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