从可测性设计角度讨论了信息安全处理芯片的芯片级测试控制器的设计以及相应核的可测性设计。
The design of chip test controller of a security chip and design for test of corresponding cores are discussed in detail.
本文在对目前主要的可测性设计方法进行研究的基础上，根据所设计CPU的结构特点，采用了边界扫描技术和基于BILBO的内建自测试技术结合的可测性设计方案。
Based on the research of primary DFT method and the structure characteristic of designed CPU, the article combines the boundary scan and Build-In Self-Test based on BILBO to test.
全扫描设计通过提升电路的可控制性和可观察性，大大降低了测试生成的复杂度，被认为是最有效的可测性设计方法之一。
Full-scan design which upgrades the circuit in the controllability and observability greatly reduces the complexity of test generation, which is considered the most effective method of DFT.
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