对置换跳时序列与二次同余跳时序列、三次同余跳时序列、双曲同余跳时序列进行了性能比较。
Secondly, the performance of time-hopping sequences based on permutation-sequences, quadratic congruence sequences, cubic congruence sequences and hyperbolic congruence sequences are compared.
对照数据手册的时序要求优化硬件逻辑设计，解决了双核嵌入式处理器TMS320 VC 5471和USB芯片PDIUSBD12时序不兼容的问题。
We have optimized the hardware logic according to the timing requirement on datasheet, and solved the timing incompatibility between the dual-core processor TMS320VC5471 and the USB chip PDIUSBD12.
检测电路分为全桥平衡模块、电荷放大器模块、信号放大模块、相关双采样模块、采样保持模块、闭环反馈模块、低通滤波模块和数字时序控制模块。
The circuit is divided into full bridge module, charge sense amplifier module, correlated double sampling and holding module, closed-loop feedback module, low-pass filter and time controlling module.
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