在单指令流单数据流结构中,有单一的指令周期,在执行前,单个处理机按序取操作数。
In an SISD architecture there is a single instruction cycle; operands are fetched serially into a single processing unit before execution.
这一方法使得高速流水线的单指令流-单数据流计算机与阵列机、向量机的一些成果,通过“相似性”可以相互推广。
Because of this similarity, some methods from high-speed pipeline SISD computers can be extended to array processors or vector computers, and vice-versa.
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