读和写操作是通过两条公共的数据总线进行的：其中一条联结32个奇数列，另一条联结32个偶数列，用一个公用的主放大器把数据输出。

Read and write-operations are carried out by two common data buses: one is connected with the 32 odd rows, the other is for the 32 even rows. The data output is executed by a common main amplifier.

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然而，从点对点到使用公用的通信总线，这种通信方式的改变在控制系统中引入了不同形式的时延。

However, the change of communication architecture from point-to-point to this common-bus approach introduces different forms of time-delay uncertainty in the closed-loop system dynamics.

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