• full swing - 引用次数：4

  In order to reduce the lock time of PLL, the frequency limiting circuit is introduced to this VCO. In order to provide a full swing of frequency source, a shaping circuit is introduced in this VCO.

  特别地,为了减少PLL的锁定时间,在偏置电路中引入限频电路;为了给PLL提供全摆幅的是信号,在VCO的输出电路后设计了整形电路。

  参考来源 - 电荷泵锁相环的压控振荡器设计
  full-swing - 引用次数：1

  参考来源 - BiCMOS电路驱动结构及设计研究

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