... parallel buffer 并行缓冲器 parallel-by-bit 位并行(计算机的) parallel by character 字符并行处理 ...
基于88个网页-相关网页
按最大并行度进行分类：字串行、位串行(WSBS):N=1,M=1；字并行、位串行(WPBS):N=1,M>1； 字串行、位并行(WSBP):N>1,M=1；字并行、位并行(WPBP):N>1,M>1。
基于44个网页-相关网页
...进行分类：字串行、位串行(WSBS):N=1,M=1；字并行、位串行(WPBS):N=1,M>1； 字串行、位并行(WSBP):N>1,M=1；字并行、位并行(WPBP):N>1,M>1。
基于36个网页-相关网页
位并行相联存储器 bit-parallel associative memory ; bit-parallel a ociative memory
位并行增强型主机接口 Enhanced Host Port Interface
字组串行位并行 word-serial and bit-parallel
二进位并行加法器 Binary parallel Adder
位并行的 Bit-parallel
字并行位并行 WPBP
并行进位 simultaneous carry ; [计] parallel carry
位并行相联处理机 bit parallel associative processor
并行移位 [计] parallel shift
Considering the strong computing ability and a high degree of parallel architecture of Graphic Processing Unit(GPU), the paper chooses one of multiple string match algorithms based on bit-parallelism, called M-BNDM algorithm, which is to be implemented on GPU and optimized.
图形处理器(GPU)具有较强的单一运算能力及高度并行的体系结构。 根据上述特点，选择基于位并行技术的多模式串匹配算法M-BNDM，将其移植到GPU上加以实现和优化。
参考来源 - 基于GPU的位并行多模式串匹配研究·2,447,543篇论文数据，部分数据来源于NoteExpress
MAI管理设备控制器内的所有状态寄存器，并且通过8位并行数据线与设备端mcu进行数据交换。
MAI, which manages all the control status registers, exchange data with MCU through 8-bit data bus.
输出数经74164输出的8位并行数据送至8段LED，实现测量数据的显示，实现可视的计数功能。
The output number delivers to 8 section of LED after 74164 outputs8 bit parallel data, the realization survey data demonstration, realizes visibly count...
应用汇编语言编写了二次引导程序，采用16位并行异步存储器加载方式，实现计量单元上电自动运行。
Assemble language was used to write second boot loader, and 16-bit parallel asynchronous memory Loading mode was adopted to achieve automatic run after energization.
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