VLSI layout design VLSI布图设计
vlsi layout verification vlsi版图验证
Analog VLSI layout 模块集成电路版图设计
VLSI circuit layout 超大规模集成电路布局
vlsi cad schematic layout vlsi原理图布图
VLSI layout circuit extraction provides a reliable tool for the estimation of circuit's performance.
集成电路版图提取为精确估计电路性能提供了可靠的手段。
In this dissertation, we designed the architecture and the workflow of the analog VLSI layout automation tool.
本文设计了模拟集成电路版图设计自动化工具的流程。
The placement problem is an important problem in VLSI layout design, but results from traditional methods are not satisfied.
布局问题是VLSI布图设计中的重要问题，传统的方法很难得到满意的解答。
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