Video Decode Loop 视频解码
video decode thread 视频解码线程
TVP5150 video decode 视频解码芯片TVP
HD video decode accelerator mini-card 加速解码迷你卡
video code and decode 视频编解码
decode of video 视频解码
video encode and decode 视频编解码
FPGA as controller initialize video decode chip SAA7111A through I2C bus.
FPGA作为控制器,经I2C总线对视频解码芯片SAA7111 A进行初始化。
To system needs, video decode program is designed by simulation of MCU's IO to I2C time sequence.
利用单片机IO口模拟I2C时序,实现了视频解码芯片控制;
In the part of video decode, chip SAA7111A is adopted to decode the video image signal, enhancing the speed of image display.
在视频解码部分采用硬件芯片SAA7111 A对视频图像信号进行解码,提高图像显示的速度。
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