Timer is an important part of Radar system, it affords system all the AP timing signals and wave gate timing signals.

定时器是雷达系统的重要部分，它为雷达全机提供所需的各种主脉冲定时信号和波门定时信号。

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Static timing analysis is widely applied in timing verification because of its high speed and great capacity. The gate delay computing is a critical part of static timing analysis.

静态时序分析由于速度快和容量大而广泛应用于时序验证，而门延时的计算则是静态时序分析中的关键部分。

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The kernel functions such as test signal storage, video timing signal generation and systems control signal generation are realized by field programmable gate array(FPGA).

采用现场可编程门阵列（FPGA）完成测试图案数据存储、各种视频标准时序产生及系统控制信号产生等核心功能。

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