level-three cache 第三阶快取
Great Wall of three cache 长城三年窖藏
three-dimensional cache model database 三维模型表现数据库
The latter three cache and optimize the byte code, providing for even greater speedups.
后三类加速器能够缓存和优化字节码,这为系统提供了更多的速度提升。
You will create the first cache, and then provide the appropriate parameters for the final three caches.
您将创建第一个缓存,然后为最后三个缓存提供适当的参数。
Due to the latency difference between main memory and on-chip memory cache, POWER7 was designed with three levels of on-chip cache (see Figure 1).
由于主内存和芯片级内存缓存之间的延迟差别,POWER 7设计了三种级别的芯片级缓存机制(见图1)。
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