Thread-Level Parallelism 线程级并行
The microprocessor architecture design has entered the era of thread level parallelism.
目前微处理器系统结构设计已经进入线程级并行的时代。
参考来源 - 线程级并行的硬件技术研究·2,447,543篇论文数据，部分数据来源于NoteExpress
The microprocessor architecture design has entered the era of thread level parallelism.
目前微处理器系统结构设计已经进入线程级并行的时代。
These sorts of applications are characterized by large amounts of live heap data and considerable thread-level parallelism, and are often run on high-end multi-core processors.
这类应用的特点是存在大量活跃堆数据和线程级别的并发，并且往往运行在高端多核处理器上。
The thread control method is an important component to implement thread-level speculation (TLS) and extract thread-level parallelism (TLP) when running general-purpose sequential applications on SCMP.
对于通用串行应用程序，高效的线程控制方法是实现线程级前瞻、挖据线程级并行性的一个重要组成部分。
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