This structure is suitable for breakdown voltage below 300V to obtain ultra-low specific on-resistance.
在低于300V击穿电压条件下这种结构使VDMOS具有超低的比导通电阻。
In order to obtain good compromise of the breakdown voltage and the specific on-resistance of SOI-LDMOS, a SOI-LDMOS with trench oxide in drift region is proposed.
为了获得SOI - LDMOS器件耐压和比导通电阻的良好折衷，提出了一种漂移区槽氧soi - LDMOS高压器件新结构。
The procedure for insulation resistance testing consists of preparing, conditioning, and measuring the sample. Details may vary, based on specific test methods.
绝缘电阻测试的步骤包括样品准备、条件控制和测量样品等。根据特定的测试方法，具体的步骤可能会有所变化。
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