With the establishing of verification and test platform for SDH chip, We realize the function simulation, timing simulation and performance test of the IP soft-core.
通过建立SDH芯片验证平台和SDH芯片测试平台，实现IP软核的功能仿真、时序仿真和芯片性能测试。
According to the theory in video compression as well as the simulation and verification requirement in IP core designing, the FPGA based IP core simulation platform is developed.
结合视频压缩的理论以及IP核设计中对于仿真验证的要求，本文设计了视频压缩IP核FPGA仿真验证平台。
On the system verification platform, the function simulation in system level about the pseudo LRU mechanism and MESI protocol is taken, and the results conform to the original intension of our design.
此外，为了验证LRU算法和一致性协议，我们在验证平台上做了相关的系统级功能模拟，逻辑模拟结果和设计初衷是吻合的。
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