Summarily, the use of FPGA device simplifies the system design and improves the performance.
通过对FPGA器件的使用，简化了系统设计，提高了系统的性能。
The application of FIFO simplifies the design of DRFM and raises the stability and reliability of the system.
应用FIFO大大简化了DRFM系统的设计，且提高了系统稳定性和可靠性。
The applying of CPLD in this logic design simplifies the hardware and saves the system resources.
将CPLD应用到逻辑电路设计中，既简化了硬件电路，又节省了系统资源。
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