There has to be some gap of clock cycles between the unblocking of signals and the next instruction carried by the process, and any occurrence of a signal in this window of time is lost.
从消除信号阻塞到进程执行下一个指令之间,必然会有时钟周期间隙,任何在此时间窗口发生的信号都会丢掉。
C1E tries to provide more power savings than the traditional C1 state (which only halts the clock signal) by also lowering the voltage and frequency.
同样通过降低电压和频率,C1E尝试比传统C1状态(只会停止时钟信号)提供更大的电能节省。
Clock signal and clock skew become more and more important in the circuit performance.
时钟信号和时钟偏差对电路性能的影响也越来越明显。
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