The digital decimation filter taking the important constituent in the Delta-Sigma Analog-to-Digital converter is realized by the multistage structure.
数字抽取滤波器是它的重要组成部分，通常采用多级结构来实现。
This invention discloses a Delta-Sigma Digital to Analog Converter (DAC), comprising a Delta-Sigma modulator and a Finite Impulse Response (FIR) filter.
本发明揭露一种三角积分数模转换器，其包含三角积分调制器以及有限脉 冲响应滤波器。
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