计数(timer)/ 比较(compare)单元不论是事件时序(event timing)、 采样循环(sampling loop)及产生PWM等均被设计成占 用CPU最少的时间;可编程配置的死区(dead band) 单元,不需外加产生死区的逻辑电路;捕获(Capture)...
基于6个网页-相关网页
... 阻气进样阀 pneumatic injector valve 进样环管 sampling loop; samplingloop 气动式进样阀 pneumatically operated sampling valve ...
基于2个网页-相关网页
two-loop sampling valve 双环管进样阀
closed-loop sampling system [自] 闭环采样系统
sampling phase-lock loop 取样锁相环
应用推荐