Finishing one time of grain renewing in sampling channel needs about 28 seconds.
历时28秒左右取样通道完成一次谷物更新。
CPLD controls the switching of sampling channel and the reading and writing of converted data.
用CPLD控制采样通道的转换,读写转换数据。
For hardware design, RC filter, voltage sensitive resistor and photoelectric isolation method are used to eliminate interference signal in sampling channel and A/D channel.
在硬件方面,采用RC滤波器、压敏电阻、光电隔离等措施,消除了采样通道及A/D通道的干扰信号;
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