FIG. 5 illustrates an example of pulse width generator 404, according to another embodiment of the present invention.
图5示出依照本发明另一个实施例的脉冲宽度发生器404的示例。
Thus, pulse width generator 404 generates a delay between a falling edge of VIN and a subsequent falling edge of VOUT.
因此，脉冲宽度发生器404在VIN下降沿和随后的VOUT下降沿之间产生延迟。
According to further embodiments of the present invention, pulse width generator 404 can have 3, 4, 5, 6, or more separate delay paths.
依照本发明进一步的实施例，脉冲宽度发生器404可具有3,4,5,6或更多个分离的延迟路径。
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