Logic for interface to the back-side bus for accesses to the internal unified level two processor cache.

访问内部统一二级处理器缓存的后端总线接口逻辑。

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When a thread exits a synchronized block as part of releasing the associated monitor, the JMM requires that the local processor cache be flushed to main memory.

当线程为释放相关监视器而退出一个同步块时，J MM要求本地处理器缓冲刷新到主存中。

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Under heavy system loads, specifying which processor should run a specific thread can improve performance by reducing the number of times the processor cache is reloaded.

在高系统负载的情况下，指定该由那个处理器执行特定的执行绪，可以减少重新载入处理器快取的次数，因而增进效能。

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