A novel16fixed point embedded SIMD array coprocessor which is used to solve low image comprehension is described in the paper.
论文介绍的SIM D协处理器是用于低层图像理解的16位定点嵌入式阵列处理器。
High-Speed Floating-point Adder is a critical part in the coprocessor, which is attached to the computing basis of floating-point instructions.
浮点加法器是协处理器的核心运算部件，是实现浮点指令各种运算的基础，其设计优化是提高浮点运算速度和精度的关键途径。
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