PLL VCO Range Select Register 范围选择寄存器
Integrated PLL and VCO 辅助属性
As the voltage VCTR varies, VCO 104 varies the frequency of the VCO output signal, causing phase offsets and increased output jitter when PLL 100 is in lock mode, as shown by dotted line 202.
随着电压VCTR改变，VCO 104改变VCO输出信号的频率，使得当pll 100处于锁定模式时引起脉冲偏移和增大的输出抖动，如图中虚线202所示。
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