If the pin assignments within the FPGA do not agree with the implemented design at the board level, damage can occur to either the FPGA component or the board-level circuits.

如果FPGA上的引脚分配与在电路板一级实现的设计不符的话，就会损坏fpga器件或电路板上的外围器件。

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The characters which you see should appear back in the terminal window... Congratulations, you have just made a "loop back cable", and you have got the pin assignments correct.

字符您看到应该会出现在该终端窗口…祝贺您，您刚才提出了“环回线”，你得到了引脚分配正确的。

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