two-phase multiplier 两相摩阻折算系数
two phase pressure drop multiplier 两相压降倍率
phase locking frequency multiplier 锁相倍频器
phase-amplitude modulation multiplier 相位振幅调制乘法器
digital phase-locked frequency multiplier 数字锁相倍频
Taking advantage of the analysis of the bias, an unbiased correlator without multiplier is deduced for Gaussian process and sinusoidal wave with random phase.
利用偏差分析的结果，可以得出一个对正态过程和随机相位正弦波都是无偏的不用乘法器的相关器。
Simulation results show the PLL clock frequency multiplier has lower phase noise and shorter capture time.
结果表明，PLL倍频器具有较低的噪声和较高的捕获速度。
In the paper it was studied that the frequency synthesizer and multiplier and the phase modulation circuit of the rubidium atomic frequency standards (RAFS).
本论文重点是研究被动型铷原子频标中的调制电路、频率合成电路和倍频电路。
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