...;并行结构;最佳组合 [gap=629]Keyword: ECC; point multiplication; coordinate conversion; parallel hardware architecture; best combination ...
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The EBCOT design USES parallel processing and dynamic memory control (DMC) architecture, which greatly speeds up the coding process and achieves higher hardware utilization.
EBCOT采用的并行运算和动态内存控制(DMC)结构,在保证编码速度的前提下,最大限度减小了片内小波系数缓存量和访问频率。
This paper presents a plan for the architecture of a parallel database machine based on the special hardware, SADM.
本文提出了一种基于专用硬件的并行数据库机体系结构SADM方案。
This thesis achieves the following three innovative results: 1 the thesis presents a new parallel array 2-d discrete wavelet transform DWT hardware architecture based on lifting schemes.
以下是本文的三个创新性成果:1设计了一种并行阵列式二维离散小波变换DWT提升格式的硬件结构。
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