In this paper, design technologies of sub-micron CMOS gate array, such as building library, testability, clock design, power-ground design, architecture optimizing, margin design, are presented.
本文主要论述亚微米cmos门阵列的设计技术，包括建库技术，可测性设计技术、时钟设计技术、电源、地设计技术、电路结构优化、余量设计技术等，最后给出了应用实例。
Meanwhile, measures such as optimizing the librarian's knowledge structure and enhancing the librarian's information literacy should be taken so as to vitalize the traditional library.
同时通过优化员工知识结构、提高馆员信息素养等措施为传统图书馆注入新的生命力。
The emphasis is improving creating library technology in layout library, such as optimizing cell widths and optimizing cell heights , furthermore, optimizing routing.
主要改进了标准单元库中版图库的建库技术，接着结合与门版图设计实例详细讲解了这些建库技术的应用。
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