To reduce the inductor and the phase displacement between the input current and the input voltage simultaneously, Multi-level (ML) converters are adopted as the PFC topologies in this thesis.
为了同时减小电感和输入电流与输入电压间的相位差,本文提出采用多电平变换器作为PFC变换器的拓扑。
Thus, if the STS-SVM can be employed in cascade multi-level converters, the advantages of STS-SVM and cascade multilevel converters will be put forth more sufficiently.
因此,将STS - SVM技术应用于级联型多电平变流器,就可以更加充分地发挥两者的优势。
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