This detector line array is fabricated using 2 micron design rule and a double level poly silicon structure.
器件采用最小2微米设计规则,两层多晶硅结构。
This paper presented the various technologies in RF design and explored the feasibility and difficulties of deep sub micron CMOS RF design. And problems associated are also discussed.
本文介绍了当今RF设计的主流工艺,并分别对基于硅的深亚微米cmos工艺在RF设计中的可行性和困难进行了研究,评述了其中存在的问题。
A new method for layout design based on region constraints was presented to resolve the timing closure problem of physical design in deep sub-micron technology.
针对深亚微米工艺下版图设计中存在的时序收敛问题,提出了一种区域约束的版图设计方法。
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