Given these trends, it was expected that memory latency would become an overwhelming bottleneck in computer performance.

鉴于这些趋势，预计内存延迟将成为压倒性的计算机性能的瓶颈。

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Thus, it is important to study protocols and implementation of system bus to hide memory latency and increase memory access rate.

因此研究系统总线协议及其实现技术对于隐藏访存延迟和提高访存速度具有重要意义。

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Off-chip memory latency is mainly determined by DRAM latency, and memory bandwidth is determined by data transfer rate through the memory bus.

片外存储系统的访存延迟主要由DRAM延迟决定，带宽则是由内存总线的数据传输率所决定。

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Customers may also pre-install other high performance components to the servers from the factory, including low latency network cards, high performance memory, and hot swappable front-facing PCIe SSD storage.

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The low-profile, half-length WarpDrive card plugs into a standard 8 lane PCIe Gen 2.0 server slot and is designed to deliver high performance with low latency and a low CPU burden independent of main memory size.

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To further cut costs, Sony is also said to be considering a switch from the speedy Rambus XDR memory to more traditional DDR3 memory, which could apparently be tied directly to the processor to cut down on latency.

ENGADGET: Sony said to be hanging onto Cell processor for PlayStation 4