The irredundant sorting bus encoding method reduces the power dissipation of highly capacitive memory address bus based on the dynamic reordering of the modified offset address bus lines.
提出了一种新的低功耗非冗余排序总线编码方法，通过对改进的偏移地址线的动态重排以降低具有高负载的地址总线的功耗。
The address bus is used by the processor to select aspecific memory location or register within a particular peripheral.
地址总线被处理器用来选择在特定外设中的存储器地址或寄存器。
A memory address consists of binary data being output on an appropriate bus which we call the address bus.
一个存储器地址是由输出到适宜的总线上的二进制数据所组成。这个总线我们称为地址总线。
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