... 规格下限(Lower Size Limit) 低速逻辑(Low Speed Logic) 激光立体制版(Laser Stereo Lithography) ...
基于164个网页-相关网页
This paper introduces the design and realization of a high-speed and low-cost virtual logic analyzer based on FPGA and USB2.0 bus.
本文介绍了一种基于FPGA的USB2.0高速、低成本的虚拟逻辑分析仪的设计原理与实现方法。
Level restoration pass-transistor logic is proposed for low speed cell while dynamic transmission gate logic for high speed cell.
低速单元采用带有电平恢复的传输管逻辑实现，高速单元采用动态传输门逻辑实现。
The product is specifically designed to provide well-regulated supply for low voltage IC applications such as high-speed bus termination and low current 3.3v logic supply.
本产品专门设计用于提供规则电源，主要是为低压ic应用：如高速总线终端和3.3 V低电流逻辑电源等供电。
应用推荐