... interrupt mode 保持状态 interrupt priority 中断优先权 interrupt processing 中断处理 ...
基于2个网页-相关网页
interrupt priority system 中断优先权系统 ; [计] 中断优先系统
interrupt priority level [计] 中断优先级 ; 中断优先等级
Interrupt Priority Register 中断优先级寄存器 ; 暂存器 ; 存器
interrupt priority table [计] 中断优先表
interrupt priority signal 中断优先级信号
layered interrupt priority 分层中断优先级
IPL Interrupt Priority Levels 中断优先级别
priority interrupt 优先中断 ; 优先序岔断
interrupt priority threshold 中断优先阈值 ; [计] 中断优先阈
The design of clock simulation is described. It presents how to use simulation clock as pacesetter to control computer system and the work principle of the interrupt simulation,describes control measure about interrupt signal taking place and interrupt priority control.
介绍了模拟时钟的设计思想,以及中断控制模拟器的工作原理,描述了中断信号的发生、中断优先级的控制措施。
参考来源 - 嵌入式软件模拟测试平台的设计与实现技术 in C·2,447,543篇论文数据，部分数据来源于NoteExpress
A method on expansion of multilevel interrupt priority for MCS 51 single chip computer with software is studied.
介绍了一种在不增加任何硬件的情况下用软件扩展MCS - 51单片机多中断优先级的方法。
These changes provide a fully preemptible kernel, threaded interrupt handlers, high-resolution timers, priority inheritance, and robust mutexes.
这些更改提供了完全抢占式内核、线程中断处理程序、高分辨率计时器、优先级继承和健壮的互斥锁（mutex）。
The time between the arrival of the interrupt and dispatching of the required task (assuming it's the highest-priority task to dispatch) is called the response time.
中断到达与分发必需任务之间的时间(假设分配的是优先级最高的任务)称为响应时间。
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