In this paper, an architecture based on sample parallel coding within a column for EBCOT was adopted, with hardware speed-up way design, to upgrade EBCOT coding performance.
因此本文以硬件加速的方式来实现EBCOT模块的结构,提出了一种基于列中样点并行的EBCOT结构。
参考来源 - JPEG2000编解码算法及优化研究·2,447,543篇论文数据,部分数据来源于NoteExpress
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