Thirdly, in the process of designing the RS encoder, the paper puts forward two-level optimization of multiplication circuit and uses symmetric coefficients generator polynomial in order to greatly reduce hardware resource consumption.
其三,设计RS编码器时,对乘法运算电路进行两级优化,并运用对称系数的生成多项式,大大减少了硬件资源的消耗。
参考来源 - 数字电视信道编码系统的研究与设计·2,447,543篇论文数据，部分数据来源于NoteExpress
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