The method further includes determining a program state of the FinFET fuse.

上述方法还包括测定该鳍型场效应晶体管熔丝的一编程状态。

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A method is described for fabricating and antifuse structure (100) integrated with a semiconductor device such as a FINFET or planar CMOS devise.

本发明提供了与如FINFET或平面CMOS器件的半导体器件集成的反熔断器结构(100)及其制造方法。

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The multi-year collaboration delivered the foundational modeling technologies for 3D parasitic extraction, circuit simulation and physical design-rule support of FinFET devices.

ENGADGET: Samsung reveals its first 14nm FinFET test chip, should offer substantial power improvements in future silicon

We continue to pool our expertise to deliver innovative FinFET solutions.

ENGADGET: Samsung reveals its first 14nm FinFET test chip, should offer substantial power improvements in future silicon

The shift from planar to FinFET-based 3D transistors is a significant change that requires close technical collaboration between tool developers, foundries and early adopters to deliver a strong solution.

ENGADGET: Samsung reveals its first 14nm FinFET test chip, should offer substantial power improvements in future silicon