The BlockingQueue interface states that it is a Queue, meaning that its items are stored in first in, first out (FIFO) order.
BlockingQueue接口表示它是一个Queue，意思是它的项以先入先出(FIFO)顺序存储。
The asynchrony FIFO module can be applied in the other asynchrony interface circuit design in multi-clock system.
异步fifo的设计方案对于多时钟系统中异步接口电路的设计具有一定的参考价值。
The data encrypt card using DSP chip, PCI interface chip, asynchronism FIFO chip and EPLD that realize the control of the data encrypt card is designed and implemented.
数据加解密卡的硬件设计和实现。 采用DSP芯片、PCI接口芯片、异步FIFO等器件，通过EPLD控制实现了数据加解密卡；
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