• 等价性检查 - 引用次数：2

  The equivalent checking in the formal verification was through the whole of digital circuit back-end design, such as: the comparison between RTL and netlist; the one between netlist and layout.

  有代码与综合后网表之间的验证等价性检查;综合后的网表与布局布线后设计之间的等价性检查。 论文描述了数字电路后端验证的发展和流程。

  参考来源 - 数字电路后端的形式验证方法研究及应用

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