In this paper, a VLSI implementation method of design-for-testability for DCT is presented.

本文提出了一种离散余弦变换电路VLSI实现的可测试性设计。

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The design and implementation of high speed low power VLSI structure and the analysis and design of high performance on-chip interconnect are two key fields of VLSI design.

高速低功耗VLSI结构的设计实现以及片内高性能互连线的分析设计是VLSI设计的两个关键领域。

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