It can simulate the real environment and improve the verification of algorithm greatly.
真实模拟了实际环境，大大提高了算法的验证效率，并为以后的实验提供方便。
In addition, we propose a new verification method combining graph reduction and graph spread, also the algorithm of verifying process models.
另外了提出了一种新型的图形归约和图形展开相结合的验证方法及过程模型验证算法。
An efficient network comparison algorithm for layout verification of integrated circuits is presented.
提出了一种有效的验证集成电路版图的网络比较算法。
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