central timing trigger system 中央定时触发系统
A binary tree routing topology is designed for propagating the system clock and trigger signal and the accurate timing and synchronization between sensors are provided by CPLD.
设计了二进制树型拓扑结构传播统一的系统时钟和触发信号，采用CPLD提供传感器间的精确时序和同步。
FPGA is used as trigger source. The data acquisition of precise timing has been realized with edge-trigger manner. Meanwhile, the data analysis is also realized in the system.
系统采用FPGA作为数据采集触发信号源，实现了精确定时的数据采集，同时对采集的数据进行分析和处理。
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